Non-mainstream technologies can offer advantages over more commonly used approaches, but usually at some additional cost (otherwise they’d probably be mainstream). The additional cost could be in ...

In an era when power has become a fundamental design constraint, questions persist about whether asynchronous logic has a role to play. It is a design style said to have significant benefits and yet ...

Managing the power consumption of ICs is an increasingly difficult challenge, because each new generation of portable device includes expanded features and demands longer battery lives.

As system-on-chip (SoC) designs grow larger, designers must grapple with serious global timing problems, the effect of wire loading and timing delays and the performance hit associated with supporting ...

EDA and IP startup Silistix is unveiling tools that it claims will free IC designers from slavery to a single system clock by allowing them to stitch together IC design blocks with the company's ...

Over the recent years post-silicon SoC validation has become a major bottleneck in IC design. Due restricted design cycle time and test bench limitations almost all the designs are taped-out with ...