EDN

Putting a polyphase filter in processor array

While most articles in this section discuss the reprogramming of graphics processors, other large arrays of processing elements are available as standard-product ICs for other applications. In some ...
EDN

Filter banks, part 2: Optimization and synthesis

Before we proceed, let's quickly review our filter bank example. Our example, shown in Figure 1, is a size 16 DFT filter bank. The color scheme shows the sample rate change where a 16 MHz input sample ...
Design-Reuse

Optimizing Up/Down Conversion with FPGA Techniques

Digital upconverters (DUCs) and digital downconverters (DDCs) are important components of every modern wireless base station design. While many DUC and DDC designs are available, there is a clear call ...
Design-Reuse

RF Engines contracted by Australia's Defence Science and Technology Organisation (DSTO)

Polyphase filtering designs for FPGA provides performance boost for DSTO’s advanced receiver design. April 10, 2006 -- RF Engines (RFEL), the experts in signal processing for FPGA, have been awarded ...