Business Wire

MIPI M-PHY Update Doubles Peak Data Rate for Next-Generation Flash Memory Storage Applications

PISCATAWAY, N.J.--(BUSINESS WIRE)--The MIPI Alliance, an international organization that develops interface specifications for mobile and mobile-influenced industries, today announced a major update ...
Business Wire

Kioxia First to Introduce Next-Generation UFS Embedded Flash Memory Devices Supporting MIPI M-PHY v5.0

TOKYO--(BUSINESS WIRE)--Kioxia Corporation, a world leader in memory solutions, today announced sampling [1] of the industry’s first [2] Universal Flash Storage [3] (UFS) embedded flash memory devices ...
Manila Standard

Cadence and Samsung Foundry deepen 2nm and 3D‑IC collaboration to meet surging AI infrastructure and physical AI demand

Multi-year agreement expands Memory, NVIDIA NVLink-C2C and advanced Interface IP, and agentic AI-optimized GPU‑accelerated ...
Semiconductor Engineering

Week In Review: Design, Low Power

Cadence will acquire Rambus’ SerDes and memory interface PHY IP business. Rambus will retain its digital IP business, including memory and interface controllers and security IP. “With this transaction ...
Design-Reuse

DDR5/LPDDR5/DDR4 Combo PHY & Controller IP Core in 12FFC - Eliminating Memory Interface Risk

A breakthrough in memory subsystem integration is redefining performance, flexibility, and time-to-market for advanced SoC designs. A fully silicon-proven DDR5/LPDDR5/DDR4 Combo PHY & Controller IP ...